AT24C64B Features
AT24C64B, the AT24C64B version ：
· Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7 to 5.5V)
– 1.8 (VCC = 1.8 to 5.5V)
· Low-power Devices (ISB = 6 μA at 5.5V) Available
· Internally Organized 8192 x 8
· 2-Wire Serial Interface
· Schmitt Trigger, Filtered Inputs for Noise Suppression
· Bi-directional Data Transfer Protocol
· 400 kHz Clock Rate
· Write Protect Pin for Hardware Data Protection
· 32-Byte Page Write Mode (Partial Page Writes Allowed)
· Self-Timed Write Cycle (5 ms max)
· High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
· Lead-free/Halogen-free Devices Available
· 8-lead JEDEC SOIC and 8-lead TSSOP Packages
· Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
AT24C64B Description
AT24C64B, the AT24C64B version ：
AT24C64B, the AT24C64B version provides 65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 8192 words of 8 bits each.
AT24C64B, the AT24C64B version ’s 8 devices to share a common 2-wire bus.
AT24C64B, the AT24C64B version is optimized for use in many industrial and commercial applications where low power
and low voltage operation are essential.
AT24C64B, the AT24C64B version is available in space saving 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a 2-wire serial interface.
In addition, the entire family is available in 2.7V (2.7 to 5.5V) and 1.8V (1.8 to 5.5V) versions.
