AT24C64C Features
AT24C64, the AT24C64C version：
· Low-voltage and Standard-voltage Operation
– 1.8 (VCC = 1.8 to 5.5V)
· Internally Organized 4096 x 8, 8192 x 8
· 2-Wire Serial Interface
· Schmitt Trigger, Filtered Inputs for Noise Suppression
· Bi-directional Data Transfer Protocol
· 1 MHz (5.0V) and 400 KHz (1.8V Compatibility)
· Write Protect Pin for Hardware Data Protection
· 32-Byte Page Write Mode (Partial Page Writes Allowed)S
· Self-Timed Write Cycle (5 ms max)
· High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
· Lead-free/Halogen-free Devices
· 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead
TSSOP, 8-lead Ultra Thin Mini-MAP (MLP2x3), and 8-ball dBGA2 Packages.
· Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
AT24C64
AT24C64C Description
AT24C64, the AT24C64C version：
The AT24C64C /32C provides 32,768/65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits each.
The AT24C64C /32C ’s cascadable feature allows up to 8 devices to share a common 2- wire bus.
The AT24C64C /32C is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential.
The AT24C32C/64C is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, 8-lead Ultra Thin Mini-MAP (MLP2x3) and, 8-ball dBGA2 packages and is accessed via a 2-wire serial interface.
In addition, the entire family is available in 1.8V (1.8 to 5.5V) version.
